Computer Science CPU Project

TTL RISC CPU Project – Building a Programmable Program Counter

The latest episode of our project to build a CPU is now online.  It’s likely to be the last for a couple of months because of the summer holidays (and my internship – more to follow on this shortly).  The series (‘Mum, I am Building a CPU’) has now passed 1500 video views, so that’s fantastic.

In this episode (embedded below), I talk about constructing a program counter with support for Jump instructions.  We built this over two bread boards, and I go through first the logic and diagrams, then the actual circuitry.

Computer Science CPU Project

Mum, I’m Building a CPU – Program Counter

The latest episode from ‘Mum, I’m Building a CPU’ is online (below).  In it we talk about the program counter and a few other goodies!

Computer Science CPU Project

Mum… I’m building a CPU – Brief Update

Since last week, we have added numerous arithmetic unit boards to our CPU as well as found an entire bus that was positioned wrongly!  Andrei has been working on connecting his full ripple-adder to the flip-flops, and Charlie and I have been working on various other boards, including the program counter and a shift/rotate functional unit (more about this one next week).

CPU Boards on 16th February New: Bottom Left: Program Counter, Top Right: Bit Shift / Bit Rotate
CPU Boards on 16th February
New: Bottom Left: Program Counter, Top Right: Bit Shift / Bit Rotate

The program counter has an interesting story behind it.  Initially, we were just looking at getting a register that would be incremented when clocked.  Then we realised it needed to be programmable to support our jump instructions (for moving between instructions and into subroutines).  We all spent a lot of time trying to find an IC that did this, and I thought I had found a CMOS IC that looked hopeful, but it was complex to program.  We were doing all this because we didn’t want to manually add ‘1’ to a 8 bit register, worried it would lead to constructing another 8 bit full adder (see Episode 2 for a discussion of this).

Realising that this appeared to be the only way, Charlie and I sat down on Saturday morning to see if we could minimise the logic required to cut down on the wiring and IC’s.  And low and behold, we did (albeit via a rather round about way)!  After completing an SOP representation and a KMAP, we put them into ‘Simple Solver‘ which said if we were tying one input to Vcc (a logical ‘1’) all we needed was an XOR and an AND.  And if you think about that, it makes perfect sense.

  • Take any binary number and add ‘1’ to it – this flips the least significant bit.
  • Then, for each next significant bit, you are just adding two things together – A (the bit) and Cin (the carry in).
  • So, put both A and Cin though an AND gate.  This represents Cout (the carry out) – if you get a 1 you need to send that to the carry in on the next significant bit when performing that sum.  If not, the carry out is set to 0.
  • Then, put A and Cin into an XOR gate.  If both are 0, the result will be 0, if exactly one is 1, the result will be 1 (0+1 = 1) and if both are 1, the result will be 0 (and this makes sense, because 1+1 = 2, and this is higher than can be represented in one binary bit, so you need to send a carry to the next significant bit’s sum, done via the above AND gate).

We really shouldn’t have needed software help for that!  Anyway, I hope you enjoy the quick video update below.